The chip which Intel term as a SOC (System on Chip) houses four CPU cores with a shared LLC cache that's interconnected through a SOC Ring which is a bi-directional, 32-byte wide bus and further connects with the iGPU and System agent. The details Intel provides on their Skylake iGPUs include a block diagram for their Core i7-6700K processor which launched earlier this month as the flagship offering on the Z170 platform. This will be the first time that we will see the die shot of Intel's 6th generation Skylake processor and dive into details of their three initial graphics chips that will try to compete with entry tier discrete graphics on the desktop and mobility based graphics chips. Starting off with the details, the first thing I should point out is that we are still waiting for Skylake CPU microarchitecture details so most of the details here are probably already known by the audience with regards to clock speeds, execution units count and various SKUs that are formed by combining slices of Gen9 iGPU (Integrated Graphics Units) blocks. Intel Skylake Gen9 Graphics Architecture Fully Detailed Right now, we can show you the full details regarding the Skylake Gen9 GPU graphics architecture which will be divided into three *initial* tiers that include GT2, GT3/e and GT4/e. The details will involve all the key information and insights on Intel's Skylake's CPU and GPU architecture. Intel is going to present architecture details for the Skylake microarchitecture tomorrow at their IDF '15 San Francisco conference.

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